![]() PROM (Programmable ROM) - Store info electrically using PROM programmer at the users site. How can we determine the clock period Usually, digital circuits are sequential circuits which has some flip flops FF FF.Ĭombinational Logic Circuit FF FF FF Setup Time FF Hold Time FF Delay Combinational logic Delay td ts,th clock period T td ts th. ![]() We call above flip flop a Clocked RS Latch, and symbolically as S Q S Q c c R Q R Q operates when operates when clock is high clock is low. R Q c (clock) Q S Clock pulse allows the flip flop to change state only when there is a clock pulse appearing at the c terminal. Otherwise, the operations of the system may be unpredictable. In K-maps, dont-care conditions are represented by ds in the corresponding cells.ĭont-care conditions are useful in minimizing the logic functions using K-map.Ĭan be considered either 1 or 0 - Thus increases the chances of merging cells into the larger cells - Reduce the number of variables in the product terms y x 1 d d 1 x d yz z x F y z. Thus, by complementing F using DeMorgans theorem F can be obtained F(x,y,z) (0,2,6) y F xy z F (xy)z (x y)z z 1 1 x 1 x z y x y F z I OR AND. Karnaugh Map x x Identification of the cell value of F x F 1 1 1 1 F(x) (1) 1-cell x 0 1 x y F y x 0 1 y 0 1 1 1 1 0 F(x,y) (1,2).īut (9,13) is covered by (1,9) and (13,15) F uvw uvx vwx uvx. ![]() Truth Table Simplified Boolean Function Karnaugh Map Boolean function. ![]()
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